The Future of the Semiconductor Industry

Description
Speaker
Dr. Geoff W. Taylor
Media Type
Text
Image
Item Type
Speeches
Description
28 April 2014 The Future of the Semiconductor Industry
Date of Publication
28 Apr 2014
Date Of Event
April 2014
Language of Item
English
Copyright Statement
The speeches are free of charge but please note that the Empire Club of Canada retains copyright. Neither the speeches themselves nor any part of their content may be used for any purpose other than personal interest or research without the explicit permission of the Empire Club of Canada.

Views and Opinions Expressed Disclaimer: The views and opinions expressed by the speakers or panelists are those of the speakers or panelists and do not necessarily reflect or represent the official views and opinions, policy or position held by The Empire Club of Canada.
Contact
Empire Club of Canada
Email:info@empireclub.org
Website:
Agency street/mail address:

Fairmont Royal York Hotel

100 Front Street West, Floor H

Toronto, ON, M5J 1E3

Full Text

April 28, 2014

The Future of The Semiconductor Industry

Chairman: Verity Sylvester, Past President, The Empire Club of Canada

Head Table Guests

William White, Chairman, IBK Capital Corp., and Director, The Empire Club of Canada;

Ian Russell, President and CEO, Investment Industry Association of Canada;

Dr. Roberta Bondar, President and Director, The Roberta Bondar Foundation;

Mike White, President and CEO, IBK Capital Corp;

Peter Copetti, Executive Director and Interim CEO, Poet Technologies Inc.;

Alex Squires, Director, Brant Securities, and Director, The Empire Club of Canada;

Jay Smith, First Vice-President, CIBC Wood Gundy;

Sheldon Inwentash, Chairman and CEO, Pinetree Capital Ltd.;

David Gilkes, Vice-Chair of the PCMA Board of Directors, Private Capital Markets Association of Canada; and

Chaplin Dekuyper.

Chaplain, King-Bay Chaplaincy

Introduction by Verity Sylvester

Ladies and gentlemen, I would like to thank you for joining us for the Empire Club’s “Spirit of a Pioneer” series.

Many of you may be asking yourself what is behind the naming of the series. The definition of a pioneer is an individual who ventures into unknown or unclaimed territory and opens new areas of thought, research, and development. Pioneers redefine convention and push the capabilities of humankind.

Today, we are proud to host such an individual—a pioneer in the semiconductor industry leading to the development of a groundbreaking method for chip manufacturers to build faster, more efficient microprocessors used in laptops, cell phones and other electronic devices.

It is now my delight and pleasure to introduce POET Technologies Executive Chairman and interim CEO, Mr. Peter Copetti. Mr. Copetti will be introducing our guest speaker today. Mr. Copetti has over 25 years of capital markets and management experience in key leadership roles. He has been the chief architect and strategist in the transformation of POET Technologies since 2012. Mr. Copetti was responsible for recapitalization of the company and refocusing its vision to become a leading platform innovator in the semiconductor industry.

Ladies and gentlemen, please join me in welcoming Mr. Peter Copetti.

Introduction by Peter Copetti

Ladies and gentlemen, members of the Empire Club, our sponsoring hosts IBK, thank you for the invitation to speak today.

I’d like to acknowledge the members of my POET Senior Executive Team that are here today, along with our board of directors, who are sitting at various tables and I’d like to especially acknowledge all our shareholders, those who are here and those who are not. The company itself is extremely appreciative of your support.

Most of us here have heard of Moore’s Law. For those who haven’t, basically Moore’s Law states that the number of transistors on a chip will double every couple of years and the performance of computing devices will follow at the corresponding pace. It’s similar to the semiconductor speedometer of the future, if you will.

For the last 50 years, Moore’s Law has held true but not anymore. Look at your cell phones. Every time we upgrade the cell phone, what do we get? Maybe a thinner screen, a better camera for sure, but the improvements are few and far between. Our batteries never seem to last. Why? Because Moore’s Law is done. It’s over.

What we need is a paradigm shift—magnitudes of orders of improvement in speed, power and consumption, all with the benefits of lower manufacturing costs and compatibility with existing manufacturing tool sets. POET is the only true solution.

That paradigm shift is exactly what Dr. Geoffrey Taylor laid out to me in May of 2012 when Mr. Benadiba and I first met him at the University of Connecticut. At that time, POET Technologies did not exist. The company was called Opal Solar and it was saddled in debt, focused on solar, with Dr. Taylor’s technology in the background. There were a few on the board and senior management who believed. Those few are still with the company today, but those few persuaded me to look under the hood. What I found was a Ferrari. Now I had to look at who was driving the car. Dr. Taylor definitely had all the credentials—30 years of experience in electronic and optical device physics and over 150 papers in the world’s most respected journals and scores of patents, and widely regarded as the world’s leading authority on gallium arsenide solid-state physics. He was previously a distinguished member of the technical staff at AT&T Bell labs developing key technology for 3-5 materials. At Honeywell Instruments in Texas, he helped to develop critical optical technology for the Jupiter Orbital Probe, as well as innovation in very large-scale integrated devices. But what struck me when I talked to Dr. Taylor was this—his tenacity over more than two decades to bring that solution to technical feasibility; his vision to look out and know that the world would need such a solution when others gave up; his foresight to make that solution easily adaptable by industry today. He is the reason why I joined POET. I did so to change the semiconductor world and take POET over the goal line.

Fast forward to where the company is now. We’ve got over $11 million in cash with no debt. What I’ve done is surround myself with great people. My board of directors is second to none, and my senior executive team can stand toe-to-toe with any team in the industry.

But at the epicentre of all that is POET stands a brilliant mind, a great person, relentless in his belief of POET. We talk all the time. He is constantly working. His enthusiasm and conviction are unwavering.

Ladies and gentlemen, the vision has become real. Can we say Taylor’s Law for the next 50 years? Welcome to the future of the semiconductor industry as devised by POET Technologies, as devised by Dr. Taylor. He has proved that although we may not be able to predict the future we sure can invent it.

Ladies and gentlemen, chief scientist of POET Technologies, a native son of Canada, my friend and colleague, Dr. Geoff Taylor.

Geoff Taylor

Thank you very much, Peter. It’s an honour and a privilege for me to be able to speak to you today. I would like to thank Bill White and the Empire Club for this opportunity. As Peter alluded to, this is an exciting time for the company, POET Technologies, and it’s appropriate for me at this time to recognize the contributions of both Peter and Mark Benadiba over the last two years in redirecting the company. Basically, Peter, who has exercised the leadership role, was needed at this critical time and he rose to the occasion.

The topics I want to dwell on are the silicon device evolution from somewhere around the year 2000. We’ll talk about the transition from metal to fibre, meaning the transition from electrical to optical, what is POET, and then what will the electrical/optical interface be as we enter this new era in circuit design and how will POET impact the design. Then I want to talk about a couple of examples and one is the mobile system, the major market for optical electronics, and Moore’s Law, where it has come from and what’s next.

What I’m showing here is a snapshot of the things that have been happening, mostly provided by Intel as you can see here in the reduction in gate length. This is the feature size. This is what drives the performance of the integrated circuit. You can see that it has been coming down from the year 2003 to 2011. That’s when this was provided. Some of the gate numbers there, the feature sizes, I don’t think are quite correct. Over in the left hand corner, there’s a little table where you can see how the node relates to the gate length. But nevertheless, at 22 nanometers, these features are incredibly small. That gives you an idea and then here’s the way that this has been characterized in the industry in terms of new innovations that have driven silicon from the year 2000 to the present. They have made numerous innovations. You can see them there in the latest version in a device called the FinFET. The device goes three-dimensional. It comes out of the surface and it allows you to pinch off and get more leak reduction than you could previously. But, nevertheless, the FinFET has a limited lifetime because the feature size is now at a place where it has no room to go.

This is all summarized in this road map. This is an industry standard thing that just shows you that this is a manifestation of Moore’s Law, and you can see that in 2012 and certainly by now it’s flat lined and there’s really no more capability there.

Now I’ll do a little bit of talking about the limitations of copper wiring. This shows you how as a frequency goes up, the length that you can propagate on copper comes down and this shows you that 20 inches at 18 gigahertz is about your limit. It’s just going to get worse. The future speeds are looking at way above 18 gigahertz so this is clearly a major problem.

Then on the counter side, think about what’s happening with optical, and this shows you how optical connections have been moving with time and with decreasing distances, because distances decrease over time as we go from long-distance connections, fibre connections over large distances. This comes down to a rack-to-rack connection and as that dash line moves to the right it’s going to go from a board to a board and then finally from a chip to a chip, and the chip-to-chip function is what we see being addressed today. The point is clearly that if you’re going to do chip-to-chip connections then you’d better have an optical component on your chip; otherwise you have a real conundrum. That’s where POET comes into the picture.

So what is POET? It’s a unique, monolithic approach to integration of both optical and electrical devices. It’s done on a gallium arsenide substrate and has a single fabrication sequence. I don’t want to dwell on the nitty-gritty here too much, but these are some of the highlights. We need to be able to compete, to do the same functions, but do them faster with lower power. POET provides the optical devices and the means to connect them to move light around inside the chip and obviously we do this with much improved speed and lower power. It has unique vertical topologies for density improvement and new functionality in the form of a thyristor and last but not least, it is fully compatible with existing semiconductor technology so that it can make this transition in a competitive way.

Now we get into the specifics and I hope not too much detail here. I don’t want to put anyone to sleep but we have three different ways of doing these interfaces—trying to get from the fibre end of the chip and vice versa.

One of them is commercial today, at least to some extent, and this is the company Luxtera. The concept is that you create a silicon chip which integrates the modulators and detectors and you combine it with a discrete laser, external laser, and then you try your darndest to make the transmit drive and the receive amplifier on that same chip, but in the event that that doesn’t work for you, then you have to combine these things with a hybrid packaging approach. The only way to go to a shorter reach and higher speed is you need higher power, or to get the higher speed you need shorter reach and higher power. That means you need to bring these things together as close as you can but there is only so much you can do.

The other approach, number two, is a company called Onechip and there it’s a very similar situation. You use your existing CMOS electronics and you combine this with a 3-5 chip, as opposed to the silicon photonic chip.

Then, of course, there’s the POET approach and in this case, we create a single chip where we integrate these components together, and then with a fibre, attach electrical bonding. Everything is within the chip and the limitations are eliminated in terms of connections.

So let’s look a little bit further at Luxtera. You can see on the left-hand side this is what they call their single chip solution but actually, it’s six inches on the side—so it’s really a single board solution, not a chip solution. What they have now resorted to is what you see on the right which is hybrid integration of the photonics and electronics. You can see at the bottom with the green arrow actually what is happening here. They are using copper pillars to connect these two chips together, so your interconnect distance now is the dimensions of that pillar. That’s about as far as you can go.

Here you can see a little more detail. The bottom will show you a little box with the yellow pedestal on the side. That’s a commercial laser that’s in a little package that’s of the order of an inch and a half by an inch and a half, and that sits on top of this board and you can see the laser input arrow. Then you see on the bottom to the right there’s the laser inside the package. It’s that little chip on one side of the blue sphere, which is your lens, and the lens gathers the light that’s collimated and then it reflects off a 45-degree surface and it’s directed down into the chip where it has to couple in where it says “laser input” on the pink board. That is a very difficult and expensive process.

The Onechip solution is very similar. You have a Onechip pho tonic integrated circuit, so that combines your optical devices. You may have a laser detector and grating and then you have all the electronic devices that are required to use that chip. You have a transceiver, microcontroller, laser driver, etc., and a trans-impedance amplifier. They all get put into that package which you see in the lower right and clearly that’s an expensive proposition. Here’s the POET solution and you can see we have fibres coming into the chip from the bottom side and you have four lasers, four detectors, four transmission channels, and four receiver channels. The laser channel is a rectangular laser. It’s coupled to a straight wave guide and the straight wave guide is driven by the CH interface circuits but what it does is it modules the reflectivity of that laser and sends the data onto the fibre.

For the corresponding receive circuit, you see there’s an SOA. That’s a semiconductor optical amplifier. You take all the gain in the optical space and then you go into the receiver which I’ll talk about in a minute. But you notice how compact and close together everything is and a huge reduction in area there.

Now I have two examples. The first one is addressing the problem of distributing in the clock in an integrated circuit and this is a problem that everyone in the industry is now facing. The clock rates are saturated and the only way to make improvements now is to distribute this clock optically, and you can see the yellow pattern. It basically is an optical conduit. So it’s a wave guide and that light is distributed to all the extremities of those H’s. So you have 16 of those in total there. This is experimentation that’s actually going on now in the industry. Laser input is coming in from the left from an external source and it makes its way to all those extremities and then it has to go on. It has to be converted to electrical form and becomes an electrical clock.

So here’s the circuit that is required to make that conversion. You can see it in the D-portion. You’ve got what we call a TIA amplifier and you’ve got six or seven limiting amplifiers and an output amplifier. That whole thing is in the top. I was just going to show that if you go in the top right there, you see the CMOS amplifier designation. That’s an area in the circuit that’s about 700 by 200 microns and contains something over 100 transistors in there and that’s to make one conversion. That’s not a prescription that you can expand upon. It’s very limiting.

Here’s how you would do it in POET technology. So you have the light coming in. First of all, the light, of course, is generated on the chip but then it should be in the wave guide. You see it coming in on the top left, the optical input. It couples into a wave guide that goes in a circle around that. That device is called a “whispering gallery mode” and as it circulates it absorbs and the circuit you see over to the right there shows it’s a thyristor with three transistors to control it and just below that you’ll see the wave form. So power in gives you voltage out and what’s happening is that the thyristor in the lower right is making the transition from A to B and back to A, because of the ability of the two transistors to turn that device off when the light goes off. So the whole function is performed in that yellow cross-section you see down below which is about 20 microns in diameter so you can do the calculation—20 micron diameter versus 700 by 200, a huge savings in area and power and improvement in speed.

Another example which is something we can all identify with is in the mobile system market, mobile electronic systems. Here’s a typical breakdown of what’s in a mobile device today. You’re transmitting by RF, that’s your Wi-Fi solution. So that’s the radio frequency block, the yellow one. Today that’s in gallium arsenide components and then you convert and do a down conversion to retrieve the data and eliminate the carrier in the blue section. That is called the “base band” and then it goes into the red block, which is the computer in your phone. That’s connected to various other auxiliary circuits of memory, which you see down on the bottom of the slide there.

If we want to look at it in a little more detail, you can see it here. Don’t try to read all these blocks. I just want to show you that this is the level of complexity inside your cell phone and that processor there has numerous CPUs on it that are all chips. So all those chips have to be mounted, connected, interfaced, etc., and then interfaced also with the RF portion over on the right-hand side. So with a POET chip, all these functions can be combined into one, single cell phone chip and we just diagrammatically show it like that. That’s POET enabled architecture.

Those are the examples that I wanted to show and then I want to make a summary of the highlights of the POET-integrated circuit. People will become familiar with these as we address these various applications, but we have a number of new features and a lot of it is based on thyristor clocking. It’s interesting. The thyristor was originally pursued by Shockley back in the early ’50s when he went to California to start a company. He thought the thyristor, what he called the “4 layered diode,” was going to become the main stream in the industry and it turned out he was wrong and it was really the MOS fit and he BJT that were going to become dominant, and that was all because he didn’t know how to remove charge quickly from the thyristor. Consequently, it was a slow device and what POET has done is come back to that problem and learn how to remove the charge quickly and so Shockley’s original ideas have actually come to life now in the POET technology.

We have all these different capabilities of multi-wave lengths, interconnect, 3-D vertical interconnect using vertical cavities, new architectures based on AD and DA conversion that are enabled by the unique optical capability. I won’t go into all of those, but the main one at the bottom is when we’re at the 10-nanometer feature side, which is where the industry is today or very close to it. The quantum side effects will now enable single electron transistors. This means these devices are so small that tunnelling can be used inside the devices to isolate single charges and this has got profound implications for the utilization of spin for future cubits, which are the basis for quantum computing.

What I’ve tried to do here is put some perspective on the time- line and the Moore’s Law paradigm that has been in place now for many years. Basically, from 1965 to the present, we have had almost 50 years of feature scaling or size reduction set by Moore’s Law. In 2015 and going forward, how far we can see is conjecture, but POET is a new paradigm and the paradigm is that there’s no longer feature scaling. You can’t scale to features smaller than you can when the quantum effects take over. But when quantum effects take over we need to use the quantum effects and reap the benefits that we can from quantum computing. In addition, of course, the optics in the chip and the new devices, such as thyristors and other yet to be determined components, are going to be activated or are going to be made possible by having optical and electrical interactions occurring simultaneously in the chip.

Finally, I want to conclude with a more graphic description of the Moore’s Law trend and how this is played out ever since 1933. As a matter of fact I’ve identified these timelines as when discoveries were made and when technologies matured. So the FET was first patented in the early ’30s and by the mid-’50s to 1960 it came into commercialization in the form of these three devices. You had the JFET, MOSFET and MESFET, in silicon and gallium arsenide except for the MOSFET. MOSFET was in silicon only and you can see the enormous run that the MOSFET has had from 1960 to the present. No other device could sustain that kind of progress. There was silicon MESFET briefly in the ’80s. It died; didn’t go anywhere. Gallium arsenide MESFET from the early ’70s was a significant RF player but then the HEMT2 junction came along and all of those applications were carried over to the HEMT. Today the HEMT is the premier RF device; however, of course, the HEMT doesn’t have any optical capability so its lifetime is pretty much up too. It’s right around now. So there’s no path forward for the HEMT.

On the bipolar side, in 1948, we had the discovery of silicon and gallium arsenide bipolar, improving in performance up until the introduction of the HEMT2 junction and then the HBT became the dominant player and that’s carried us through to about the present, and again, the HBT has reached the end of its life of continuous improvement. There’s no more room for it to go.

Right around 1982, we had the BiCFET and that was our work and it triggered both the bipolar and the DOES thyristor and then shortly after that we learned that it was also a laser so we have the BiCFET laser that is a thyristor laser and over on the FET side the MOSFET concept was realized in gallium arsenide in the form of the NHFET and then around 2004 in the form of the PHFET. Those two together become the CHFET and you can see that all the lines leading past 2015 are all POET devices and that is what we call the new POET paradigm. So with that I’ll conclude and hope that it hasn’t confused you too much. I’ve given you a picture of where we think the industry is going to go.

The appreciation of the meeting was expressed by Mike White, President and CEO, IBK Capital Corp.

Powered by / Alimenté par VITA Toolkit
Privacy Policy